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The key role of electrical dispersion compensation in SFP+ applications

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Technology
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2020-03-83 01:41
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[Abstract]:
Compared with X2 and XFP LRM module, SFP+ module is more challenging. In order to achieve similar performance with X2 and XFP, the SFP+ LRM module must be pre weighted linear receiver function, and the transmission distance of up to 300 meters of external electrical dispersion compensation (EDC).
CONTENT
 
Compared with X2 and XFP LRM module, SFP+ module is more challenging. In order to achieve similar performance with X2 and XFP, the SFP+ LRM module must be pre weighted linear receiver function, and the transmission distance of up to 300 meters of external electrical dispersion compensation (EDC).
Ahmet Balcioglu, Vitesse Semiconductor Corp.
In the past 10 years, the standard for optical transceiver module for 10Gbps has experienced the development of several generations of 300pin multi source protocol (MSA), XENPAK, XPAK, X2 to XFP, and evolved today's small pluggable SFP+ modules. This module increases the port density by canceling the built-in timer. In fact, as shown in Figure 1, the timer and clock recovery circuit (CDR) and the electrical dispersion compensator (EDC) are only integrated into the motherboard ASIC. The way to separate the SFP+ module and the circuit board in the receiving path will increase the physical connection and transmission distance, and thus greatly damage the signal quality, so the SFP+ put forward higher requirements on the performance of EDC.
At present, the media access control (MAC) and switching functions for 10Gbps CDR have come out. The integration of high speed serial I/O in ASIC can reduce the number of pins and reduce the installation cost. According to the specific circuit board design, the use of FR4 printed circuit board connection length and even more than 8 inches, but also to meet the SFF-8431 industry standards. This standard specifies the electrical characteristics of the SFP+ short range (SR), long range (LR) and long range multimode (LRM) modules, direct connections, and motherboards. Because such devices can not be fully compatible with the 10Gbps I/O standard, it is necessary to increase the ASIC circuit in the SFP+ module with a dedicated signal regulator.
This paper will discuss the technical problems encountered in the development of SFP+ system for 10G (10GbE) LRM, SR and LR applications, and the key factors that designers must consider in order to meet the actual system link redundancy. The data involved in this paper are derived from the actual test of a SFP+ evaluation system.
 
SFP+/EDC motherboard instance.
SFP+/EDC motherboard instance.
SFP+/EDC requirements
SFP+ is designed to support 10GbE SR, LR, LRM and cable direct data communication service. The SFP+ module for SR and LR belong to limited reception path, while LRM and copper direct module belongs to linear receiving path. SFP+ LRM module according to the IEEE 802.3aq 10GBase-LRM protocol in FDDI multimode fiber (MMF) upload transmission, the transmission distance of up to 220 meters. At present, 99% of the fiber is of this type, so it is necessary to equalize the dispersion of the mode. In addition to this, the signal attenuation and reflection generated by the SFP+ connector and the longest 8 inch copper connection line of the FR4 must also be addressed.
CDR devices with advanced EDC features can solve the above problems. The EDC can be implemented with different equalization techniques. It is the most commonly used method to combine feedforward equalization and decision feedback equalization (FFE/DFE) with maximum likelihood sequence estimation (MLSE).
In addition to the equalization algorithm, it is very important to design a new EDC algorithm with high repeatability and stability, which is more important than the bit error rate test (BERT). In the system designer's view, a successful EDC adaptive algorithm must be able to cover the -10dBm to +2dBm input optical power, but also can not reduce the link redundancy.
LRM stress apparatus and its characteristics
We have designed a SFP+ evaluation board to test the characteristics of the LRM stress (pre -, post - and symmetric) defined by the IEEE 802.3aq standard. The LRM stress sensor can simulate the transmission characteristics of a low MMF at least 220 meters long.
In all of the LRM stress sensors, the shunt symmetric stress device divides the light energy into two channels, which is difficult to realize. The shunt symmetric actuator requires EDC to be more flexible. Reference 1 illustrates the relationship between the channel characteristics of the SFP+ evaluation board and the forward and reflected parameters (i.e. SD11 and SD21 parameters) in the 2, 4 and 8 inch stripline.
The evaluation board is provided with a linear ROSA with pre emphasis equal to 3.4dB, so as to realize the conversion of the optical signal to the electrical signal. Then measure the loss of waveform dispersion (WDP) and the pulse response of the LRM transducer. The pre -, post - and symmetric stress sensors are provided by a Circadiant Hydra Generator Stress excitation generator, which conforms to the IEEE 802.3aq specification. In order to test the characteristics of the electric field, the signal is calibrated before entering the module board.
SFP+/EDC motherboard instance.
Table 1 shows the WDP value and delta WDP value of the symmetric stress sensor in the optical and electrical fields. According to the table, the distortion caused by the SFP+ connector and the FR4 copper line is defined by delta WDP (dWDP). Its meaning is the difference between the WDP value of the test point and the calibration reference value.
WDP measurement data show that the signal distortion is mainly caused by the SFP+ connector, the impact is more than 0.5dB. The distortion caused by the FR4 copper connection is roughly 0.5dB. If the output of the linear transimpedance amplifier (TIA) is pre weighted, the negative distortion can be generated at the junction between the module and the board (B2B), thus reducing the total distortion in the optical domain. If the linear receiver does not pre - emphasis, it will produce distortion associated with the ideal electrical WDP, as shown in table 1.
Table 1 Comparison of WDP (dB) and dWDP (dB) of shunt symmetric stress apparatus.
In addition to the analysis of WDP data, we also need to consider the impulse response. As shown in Figure 2, the SFP+ connector and the FR4 PCB stripline will significantly reduce the impulse response of the channel. Figure 2A shows that a single byte long electrical signal in the shunt through the symmetric stress device, the length of the time will be extended to 5 times the original, and figure 2B shows that the pulse propagation in the optical domain is not obvious. In addition, the shape of the pulse response changed little in the optical domain, but it changed in the electrical domain.
SFP+/EDC motherboard instance.
The impulse response of symmetric stress transducer (a) and optical domain (B).
In the electrical and optical fields, the effects of FR4 connections on the impulse response are not large for SFP+ connectors. The effects of pre emphasis ranged from 4 to 6UI, while the reflection effect of the linear ROSA was about from 6 to 7UI.
Thus, WDP degradation and single byte extent are beyond the standard, then it must influence the introduction of EDC technology is to balance the stress, and the balance distance must be greater than 220 meters, and as far as possible to reach the FDDI level of MMF 300 meters. The EDC technology can reduce the influence of the SFP+ connector by pre weighting the output of the linear module receiver, and finally establish a reliable optical link to meet the requirements of the actual system.
Test results and analysis
Changing the optical modulation amplification (OMA) sensitivity is a common method to improve the performance of optical links. The OMA sensitivity of the LRM stress sensor is measured in the B2B, 2, 4, and 8 inch FR4 SFI channels with pre emphasis linear reception. Figure 3 shows a typical SFP+ LRM module test system block diagram.
SFP+/EDC motherboard instance.
Connection diagram of OMA test system.
Figure 4A shows the relationship between the typical bit error rate and the OMA in the worst SFI channel. As shown in Figure 4b, the relationship between the OMA sensitivity and the WDP sensitivity of the shunt symmetric stress transducer in the case of B2B, 2, 4 and 8 inches FR4. It can be found that the degradation of OMA is linearly related to the WDP of the channel, which indicates that the EDC is only partially compensated for the distortion of the signal. Although EDC can not completely compensate for the distortion caused by the imperfect matching of the interface, the measured OMA sensitivity in the worst channel condition is very good. Figure 4B shows that the worst-case performance of the SFP+ module signal is at least less than that of the X2 and the XFP LRM module 1.0dB.
The relationship between BER and OMA (a) and OMA sensitivity and WDP (b) in shunt symmetric stress apparatus.
Due to the SFP+ channel will produce additional WDP distortion, and the mismatch with the FR4 will also lead to pulse expansion, which results in SFP+ channel characteristics are inferior to X2 and XFP LRM module. Although WDP can be reduced by using pre emphasis linear output, but they can not be compensated completely. Therefore, it is necessary to use an adaptive optimization method to deal with the residual WDP distortion and pulse propagation.
In SFP+ SR and LR applications, a key requirement for system designers for EDC is that it does not degrade link performance. The characteristics of SFP+ SR and LR modules are different, so adaptive equalization is needed. In the multi vendor interoperability test, SFP+ SR and LR transmitter module is composed of different manufacturers and receiver combinations, its performance may exceed the requirements of the SFF-8431 specification, reduce link performance and produce unacceptable BER.
In a word, the EDC with adaptive algorithm can be used in SR and LR applications, which can compensate for the distortion caused by the SFP+ connector and the copper loss, and provide a stable and reliable link without user intervention. Moreover, the adaptive ability of EDC can improve the tolerance of the system to different modules produced by different manufacturers.
The key role of EDC
In this paper, we study the performance of the real SFP+ channel system in the worst case. The results show that the channel characteristics of SFP+ are very different from those of X2 and XFP LRM modules. The main limitation of its link performance comes from the connector.
SFP+/EDC motherboard instance.
Pre emphasis on the TIA output can reduce the WDP distortion and LRM stress response of the pulse expansion, thereby reducing the adverse effects of connectors. In addition to the improved SFP+ connector and pre emphasis linear receiver output, with an advanced EDC algorithm can compensate the stress of LRM is 220 meters, and the SFP+ module and the PCB connection caused by the loss of the stripline. One of the most critical technologies is EDC. It can meet the performance requirements of the actual 100GbE switching and routing applications on SFP+ SR, LR and LRM modules.
 
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